# the first Makefile I write after reading the whole GNU MAKE documentation
# by the way, that documentation is in lousy writing style

# specify the compiler&build&link flags
CXX = gcc
LIBS = -lrt -lpthread
LDFLAGS =
CXXFLAGS = -Wno-deprecated -O2

# specify paths&filenames
srcdir = ./src
bindir = ./bin
objdir = ./obj

basenames = test operation matrix
obj = $(patsubst %, $(objdir)/%.o, $(basenames))
goal = $(bindir)/test

# build rules
.PHONY: all clean realclean info

all: info $(bindir) $(objdir) $(goal)
	@echo $(goal) complete

# print out some compilation information, like flags
info:
	@echo Build with CXXFLAGS = $(CXXFLAGS)
	@echo and LDFLAGS = $(LDFLAGS)
	@echo and LIBS = $(LIBS)

# /clean/ deletes everything in the bindir and objdir
clean:
	@rm -f $(obj) $(goal)

# /realclean/ essentially remove all the directories and the dependencies
realclean:
	@rm -rf $(objdir) $(bindir)

# build the directory in which .o files will go
$(objdir):
	@mkdir -p $@

# build the directory in which bin files will go
$(bindir):
	@mkdir -p $@

# build the executable
$(goal): $(obj)
	@echo $(CXX) $< --> $@
	@$(CXX) $(LDFLAGS) $^ $(LIBS) -o $@

# compilation rules
$(objdir)/matrix.o: matrix.c test.h
	@echo $(CXX) $< --> $@
	@$(CXX) $(CXXFLAGS) -c $< -o $@ 

$(objdir)/test.o: test.c test.h operation.h
	@echo $(CXX) $< --> $@
	@$(CXX) $(CXXFLAGS) -c $< -o $@

$(objdir)/operation.o: operation.c operation.h
	@echo $(CXX) $< --> $@
	@$(CXX) $(CXXFLAGS) -c $< -o $@
